• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A gate pattern is formed on the transparent substrate, and a gate insulating film and an amorphous silicon layer are sequentially deposited. The organic insulating film is spin-coated, and an organic black matrix is formed in the space between the wiring and the portion where the thin film transistor is to be formed. At this time, two contact holes are formed to expose the amorphous silicon layer on the gate electrode. Next, a resistive contact layer and a metal layer are sequentially deposited, and a data pattern including a source / drain electrode and a data line is formed, and a highly doped n + amorphous silicon layer and an amorphous silicon layer are sequentially etched using the pattern as a mask. Next, a protective film is formed on the entire surface of the substrate and a contact hole is drilled on the drain electrode. Finally, a pixel electrode made of a transparent conductive film is formed in the pixel region defined by the intersection of the gate line and the data line. In this way, the etch stopper and the black matrix pattern can be simultaneously formed using the organic insulating film formed on the amorphous silicon layer.
    公开号:KR19990030877A
    申请号:KR1019970051334
    申请日:1997-10-07
    公开日:1999-05-06
    发明作者:장근하
    申请人:윤종용；삼성전자 주식회사；
    IPC主号:
    专利说明:

    Thin film transistor substrate and manufacturing method for liquid crystal display
    The present invention relates to a thin film transistor substrate and a manufacturing method of a liquid crystal display device.
    There are various methods of manufacturing a thin film transistor used in a liquid crystal display, and each method has advantages and disadvantages. In the case of using a thin film transistor having an etch stopper structure, an etch stopper layer made of silicon nitride is usually formed on the semiconductor layer of the thin film transistor. Recently, in order to reduce photo induced leakage current generated by reflection of light by a black matrix, a method of forming a black matrix on a thin film transistor substrate rather than a color filter substrate has been widely used. This is called a black matrix on thin film transistor (BM on TFT).
    A thin film transistor substrate of an etch stopper structure black matrix on thin film transistor type according to the related art will be described with reference to the drawings.
    First, the structure of a thin film transistor substrate is demonstrated. 1 shows a cross-sectional view of a thin film transistor substrate according to the prior art.
    As shown in FIG. 1, a gate electrode 2 and a gate line 3 are formed on the transparent substrate 1. The gate insulating film 4 is formed on the gate electrode 2 and the gate line 3. An amorphous silicon layer 5 and an etch stopper layer 6 are formed on the gate insulating film 4 corresponding to the gate electrode 2. The etch stopper layer 6 is usually formed using silicon nitride. The n + amorphous silicon layer 7 is formed on both sides of the etch stopper layer 6 with the etch stopper 6 interposed therebetween. A source electrode 8 and a drain electrode 9 are formed on the n + amorphous silicon layer 7, and the source electrode 8 is connected to a data line (not shown). The gate electrode 2, the gate insulating film 4, the amorphous silicon layer 5, the n + amorphous silicon layer 7, the source electrode 8 and the drain electrode 9 form a thin film transistor. The protective film 10 is formed on the thin film transistor and the gate insulating film 4, and a contact hole for exposing the drain electrode 9 is formed in the protective film on the drain electrode 9. The black matrix 11 is formed on the passivation layer 10 on the thin film transistor, and the pixel electrode 12 made of indium tin oxide (ITO) is formed on the passivation layer 10 in the pixel region. ) Is connected to the drain electrode 9 through a contact hole drilled in the protective film.
    Next, the manufacturing process of the thin film transistor substrate shown in FIG. 1 is demonstrated.
    First, a gate pattern including the gate electrode 2 is formed on the transparent substrate 1 using the first mask. Next, a silicon nitride film used as the gate insulating film 4, an amorphous silicon layer, and a silicon nitride film used as an etch stopper are sequentially formed on the substrate on which the gate pattern is formed. A photoresist is deposited on the silicon nitride film, followed by primary exposure on the front surface of the substrate 1, and then secondary exposure without a mask on the rear surface of the substrate 1 to form a photoresist pattern. The nitride film is etched using the photoresist as a mask to form an etch stop layer 6, and the photoresist is removed. The substrate is washed with hydrofluoric acid, and then a highly doped n + amorphous silicon layer and a metal layer are deposited one after the other. The third mask is patterned using a third mask to form a data pattern including the source electrode 8 and the drain electrode 9, and the n + amorphous silicon layer and the amorphous silicon layer are etched sequentially using the mask as a mask. Next, a protective film 10 is formed on the entire surface of the substrate, and contact holes are formed in the drain electrode 9 so as to be in contact with the pixel electrode. In this case, use the fourth mask. Finally, the pixel electrode 12 made of a transparent conductive film is formed in the pixel region surrounded by the data line and the gate line using the fifth mask. The pixel electrode 12 is in contact with the drain electrode 9 through the contact hole.
    In this way, the thin film transistor substrate is completed, and all five masks are used in the process up to this point. Next, in order to form a black matrix on the thin film transistor, a pattern is formed by using a sixth mask, and a black matrix 11 is formed on an empty space between the thin film transistor and various wirings.
    As described above, at least six masks including a black matrix pattern are required to manufacture the thin film transistor substrate of the etch stopper structure black matrix on thin film transistor type.
    The silicon nitride film and the amorphous silicon film, which are insulating films, exist at the intersection of the gate line and the data line. As the display device becomes larger and more fine, the area of intersection of the gate line and the data line increases, thereby increasing the area of the gate line and the data line. There is a problem such as generating a crosstalk due to an increase in the RC delay.
    In addition, since the silicon nitride film is used as the etch stopper layer when manufacturing the etch stopper thin film transistor substrate according to the prior art, a back exposure facility is required. This causes a problem such as a decrease in yield. On the contrary, when the silicon nitride film is dry-etched, there is a problem in that the amorphous silicon layer is damaged because the difference in selectivity from the amorphous silicon layer is not large.
    An object of the present invention is to simplify the manufacturing process of a black matrix on thin film transistor substrate having an etch stopper structure. Another object of the present invention is to reduce crosstalk of a black matrix on thin film transistor substrate having an etch stopper structure. Another object of the present invention is to increase productivity and reduce costs in the manufacturing process of the black matrix on thin film transistor substrate having an etch stopper structure.
    1 is a cross-sectional view of a thin film transistor substrate according to the prior art,
    2 is a plan view of a thin film transistor substrate according to an embodiment of the present invention;
    3 is a cross-sectional view taken along line III-III 'of the thin film transistor substrate illustrated in FIG. 2,
    4, 6, 8 and 10 are cross-sectional views illustrating a manufacturing process of a thin film transistor substrate according to an exemplary embodiment of the present invention.
    5, 7, 9 and 11 are cross-sectional views taken along the lines V-V ', VII-VII', IX-IX 'and XI-XI' of FIGS. 4, 6, 8 and 10, respectively. .
    In order to achieve the above object, in the thin film transistor substrate according to the present invention, an organic black matrix film is rotated and patterned on the semiconductor layer to simultaneously form an etch stopper and a black matrix. The organic black matrix film is formed with two contact holes exposing the semiconductor layer, through which the semiconductor layer is in contact with the ohmic contact layer and the ohmic contact layer is in contact with the source electrode and the drain electrode.
    The organic black matrix film uses a material that blocks light to act as a black matrix, and has a good resistivity with a specific resistance of 10 16 or more. The thickness of the organic black matrix film is preferably formed to be 0.5 to 1.0 m.
    Now, a thin film transistor substrate and a manufacturing method according to an embodiment of the present invention will be described in detail.
    First, the structure of a thin film transistor substrate will be described with reference to FIGS. 2 to 3. 2 is a plan view of a thin film transistor substrate according to an exemplary embodiment of the present invention, and FIG. 3 is a cross-sectional view taken along the line III-III ′ of FIG. 2.
    A gate pattern including a gate line 21, 22, 27, a gate line connection part 23, a branch 24 of the gate line 22, and a gate electrode 20 that transmit a scan signal from the outside onto the substrate 10. Is formed, and the gate insulating layer 40 is formed thereon. An amorphous silicon layer 50 is formed on the gate insulating layer 40 on the gate electrode 20 and the gate line 27.
    The organic black matrix film is disposed on the amorphous silicon layer 50 between the gate line 21 and the gate line 27, between the gate electrode 20, and between the gate line connection part 23 and the branch 24 of the gate line. 60 is formed and the organic black matrix film 60 has two contact holes 68 and 69 on the gate electrode 20. The organic black matrix film 60 may be made of a material capable of blocking light to serve as a black matrix, and the organic black matrix film portion 62 between the two contact holes 68 and 69 serves as an etch stopper. In addition, the organic black matrix film used at this time should have a good resistivity with a specific resistance of 10 16 or more.
    On the upper side of the organic black matrix film 60, resistive contact layers 71 and 72 made of n + amorphous silicon doped in high concentration on both sides with a portion 62 used as an etch stopper are formed. 71 and 72 are in contact with the amorphous silicon layer 50 through two contact holes 68 and 69 bored through the organic black matrix film. The source electrode 80 and the drain electrode 90 are formed on the ohmic contact layers 71 and 72, respectively. The source electrode 80 is formed to intersect the gate lines 21, 22, and 27 and is a branch of the data line 81 which transfers an image signal from the outside. The passivation layer 100 is formed on the entire surface of the substrate on which the source / drain electrodes 80 and 90 and the data line 81 are formed, and the passivation layer 100 exposes the contact hole 109 exposing the drain electrode 90. Have In the pixel region defined by the intersection of the data line 81 and the gate lines 21, 22, and 27, pixel electrodes 121 and 122 made of a transparent conductive material such as indium tin oxide (ITO) are formed, and the pixel electrode ( 122 is connected to the drain electrode 90 through the contact hole 109 bored in the protective film 100 to receive an image signal to drive the liquid crystal molecules.
    Next, a method of manufacturing the thin film transistor substrate having the structure shown in FIGS. 2 and 3 will be described with reference to FIGS. 4 to 11. 4, 6, 8, and 10 are plan views of a thin film transistor substrate during a process of manufacturing a thin film transistor substrate according to an embodiment of the present invention, and FIGS. 5, 7, 9, and 11 are respectively FIGS. 6, 8 and 10 are cross-sectional views taken along the lines V-V ', VII-VII', IX-IX 'and XI-XI'.
    First, with reference to FIGS. 4 and 5. A gate line 21, 22, 27, a gate pad (not shown), a gate line connecting portion 23, a branch 24 of the gate line 22, and a gate electrode are formed on the transparent substrate 10 using the first mask. A gate pattern including 20) is formed. The gate pattern may be formed of a double film of an alloy film of aluminum and neodymium (Nd) and a molybdenum film, or may be formed of a single film of molybdenum, aluminum, chromium, molybdenum-tungsten or the like. Next, a gate insulating film 20 made of silicon nitride is deposited on the substrate on which the gate pattern is formed to a thickness of about 3,000 to 6,000 kPa, and the hydrogenated amorphous silicon layer 50 is deposited on the substrate to a thickness of 200 to 3,000 kPa.
    Next, as shown in FIGS. 6 and 7, an organic black matrix film is coated on the entire surface of the substrate to a thickness of 0.5 μm to 1.0 μm, and between the gate line 21 and the gate line 27, the gate line connecting portion 23. And the organic black matrix film between the branches 24 of the gate line 22 and the remaining portions except the upper portion of the gate electrode 20, and two contact holes in the organic black matrix film 60 on the gate electrode 20. (68, 69). In this case, use the second mask. After the organic black matrix film 60 is patterned, the substrate is cleaned using hydrofluoric acid (HF) to remove the native oxide film on the hydrogenated amorphous silicon layer 50.
    On the substrate on which the organic black matrix film 60 is patterned, an n + amorphous silicon layer and a metal layer to be used as an ohmic contact layer are successively deposited. 8 and 9, the metal layer is patterned using a third mask to form a data pattern including the source electrode 80, the drain electrode 90, and the data line 81. As the metal forming the data pattern, a triple layer of chromium, molybdenum-tungsten alloy, molybdenum or molybdenum / aluminum / molybdenum is used. Using the formed data pattern as a mask, the n + amorphous silicon layer and the underlying amorphous silicon layer are sequentially etched. The n + amorphous silicon layer comes into contact with the amorphous silicon layer through two contact holes 68 and 69 bored in the organic black matrix film 60 and is formed between the two contact holes 68 and 69. The film 62 serves as an etch stopper when etching the n + amorphous silicon layer and the amorphous silicon layer.
    Next, as shown in FIGS. 10 and 11, a protective film 100 is formed on the entire surface of the substrate, and contact holes 109 are formed to expose a portion of the drain electrode 90. At this time, silicon nitride can be used as a protective film, and it can also be formed using an organic insulating film for planarization.
    Finally, pixel electrodes 121 and 122 made of a transparent conductive material are formed in the display area of the pixel defined by the intersection of the gate line and the data line. The pixel electrode 122 is in electrical contact with the drain electrode 90 through the contact hole 109 formed in the passivation layer 100. Then, the thin film transistor substrate as shown in Figs. 2 and 3 is completed.
    According to the present invention, a black matrix on thin film transistor type thin film transistor substrate having an etch stopper structure can be manufactured using five masks, thereby simplifying the manufacturing process. In addition, since the organic black matrix film is used instead of the silicon nitride film as the etch stopper, the RC delay of the gate line and the data line can be reduced, thereby reducing crosstalk. In addition, unlike the case where the silicon nitride film is used as the etch stopper, the backside exposure equipment is not required, and the etching process is easier.
    权利要求:
    Claims (7)
    [1" claim-type="Currently amended] Transparent insulation substrate,
    A gate electrode formed on the substrate,
    A semiconductor layer formed on the gate electrode and insulated from the gate electrode,
    A black matrix formed on the semiconductor layer and composed of an organic material and having two contact holes exposing the semiconductor layer on the gate electrode,
    A doped amorphous silicon layer formed on top of the black matrix and consisting of two portions each contacting the semiconductor layer through the contact hole formed in the black matrix,
    A source electrode and a drain electrode respectively formed on the doped amorphous silicon layer,
    A protective film formed over the substrate on which the source electrode and the drain electrode are formed and having a contact hole for exposing the drain electrode;
    And a pixel electrode formed in a pixel region in contact with the drain electrode through the contact hole formed in the passivation layer and surrounded by the black matrix and made of a transparent conductive material.
    [2" claim-type="Currently amended] In claim 1,
    The black matrix has a thickness of 0.5-1.0 ㎛ thin film transistor substrate.
    [3" claim-type="Currently amended] In claim 2,
    The resistivity of the black matrix is 10 16 Ω · cm or more.
    [4" claim-type="Currently amended] In claim 1,
    The amorphous silicon layer is a thin film transistor substrate having a thickness of 200 ~ 3,000 Å.
    [5" claim-type="Currently amended] Forming a gate pattern including a gate line and a gate electrode on the transparent insulating substrate,
    Sequentially laminating a gate insulating layer and a semiconductor layer,
    Forming a black matrix made of an organic material and having two contact holes exposing the semiconductor layer over the gate electrode,
    Sequentially stacking the doped amorphous silicon layer and the metal layer on the black matrix,
    Etching the metal layer, the doped amorphous silicon layer, and the semiconductor layer in sequence;
    Forming a protective film,
    A method of manufacturing a thin film transistor substrate comprising forming a pixel electrode.
    [6" claim-type="Currently amended] In claim 5,
    The black matrix is a method of manufacturing a thin film transistor substrate to form a thickness of 0.5-1.0 ㎛.
    [7" claim-type="Currently amended] In claim 5,
    And the amorphous silicon layer is formed to a thickness of 200 to 3,000 Pa.
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    同族专利:
    公开号 | 公开日
    KR100495793B1|2005-09-02|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1997-10-07|Application filed by 윤종용, 삼성전자 주식회사
    1997-10-07|Priority to KR1019970051334A
    1999-05-06|Publication of KR19990030877A
    2005-09-02|Application granted
    2005-09-02|Publication of KR100495793B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019970051334A|KR100495793B1|1997-10-07|1997-10-07|Thin film transistor substrate and manufacturing method for liquid crystal display|
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